Sebastian Lam

Sebastian Lam has a diverse work experience in the field of engineering. Sebastian is currently working as a Staff Digital Physical Design Engineer at Agile Analog since 2022. Prior to that, they worked at SatixFy Space Systems UK Ltd. from 2019 to 2022 as a Physical Design Engineer, where they were responsible for developing and setting up a new PnR design flow and incorporating physical design techniques into it. Sebastian also worked on blocks in GF 45RFSOI & 22FDX, handling tasks from synthesis to GDS and physical verifications.

Before joining SatixFy, Sebastian Lam worked at Credo as a Physical Design Engineer from 2017 to 2019. Sebastian was involved in the physical implementation of High Speed Serdes IP & Chips and had multiple tapeouts in 28 & 16nm processes. Sebastian had responsibilities ranging from floorplanning and clock distribution to P&R, timing closure, and power analysis.

Earlier in their career, Sebastian Lam worked at JSAB Technologies Limited as a Product Development Engineer from 2016 to 2017. Sebastian was primarily responsible for the power stage of a BLDC motor driver IC in BCD technology. Sebastian played a key role in the new product development process, covering literature review, technology platform selection, product benchmarking, design implementation, and tapeout planning.

Sebastian Lam began their professional journey at ASM Pacific Technology Ltd. as a Process Engineer from 2013 to 2016. However, no specific details about their role or responsibilities during that time are provided.

Sebastian Lam pursued their education at the City University of Hong Kong from 2010 to 2013, where they obtained a Bachelor of Science (BS) degree in Engineering Physics/Applied Physics. Sebastian furthered their education at the Hong Kong University of Science and Technology from 2015 to 2017, graduating with a Master of Science (MSc) degree in IC Design Engineering.