Casey Alvarado

Casey Alvarado is a Senior Analog IC Design Engineer at Allegro MicroSystems since December 2022, with extensive experience in analog IC design. Prior to this role, Casey worked at SRI International as an Analog IC Design Engineer III and I from March 2019 to December 2022. Previous internships include a Research and Hardware Engineering Intern position at IBM T.J. Watson Research Center, where a proof-of-concept system was developed for monitoring elderly patients, and a Project Manager and Software Engineering Intern role at Microsoft Corporation focused on real-time failure alert tools. Earlier experience includes developing a solar panel optimization application at Texas A&M University and cybersecurity measures at Eaton's Cooper Lighting. Casey holds a Master’s degree in Electrical and Electronics Engineering from Imperial College London and a Bachelor's Degree in Electrical and Computer Engineering from Franklin W. Olin College of Engineering.