Santhosh Narayana

Santhosh Narayana has a diverse work experience in the field of hardware engineering. Santhosh started their career at Wipro Technologies in 2005 as an ASIC Design-For-Test engineer, where they worked on DFT for ARM-based SoCs. Santhosh then joined Qualcomm as a Graduate Intern in 2008, focusing on mixed signal verification and Cadence flow. In 2009, they worked as a Research Assistant at Arizona State University, where they developed a novel Design for test (DFT) technique for data converters. Santhosh then moved on to Cypress Semiconductor in 2010 as an Electrical Design Engineer, specializing in mixed signal design verification. At Intersil Corporation, they worked as a Staff Engineer from 2013 to 2016, focusing on SoC verification and analog/mixed signal modeling. Santhosh later joined Dialog Semiconductor as a Senior Engineer from 2016 to 2018. Most recently, Santhosh held the position of Sr Silicon Engineer at Google from 2018 to 2023. Currently, they are working as a Senior Hardware Engineer at Celestial AI. Throughout their career, Santhosh has gained experience in various aspects of hardware engineering, including design verification, behavioral modeling, and DFT automation.

Santhosh Narayana has a Master of Science degree in Analog & Mixed Signal Circuits, with a field of study in Electrical Engineering. Santhosh obtained this degree from Arizona State University. Prior to that, they earned a Bachelor of Engineering degree in Electronics and Communications from RV College Of Engineering. Additionally, Santhosh Narayana has completed two product management programs at Stanford University. One program is titled "Product Management: Transforming Opportunities into Great Products," and the other program focuses on "Product Management for Internet of Things."