Bilal Moussa

Bilal Moussa is an experienced professional in the field of engineering and education, currently serving as the FPGA Design Team Leader and PhD Student at MultiLane since January 2021, while also working as a part-time lecturer at Université Antonine since February 2022. Prior experience includes roles as a Firmware Engineer at MultiLane SAL, Test Engineer at IPG Photonics, and an intern position at both IPG Photonics and Inkript. Bilal holds a Doctor of Philosophy in Chip Design from UTBM, expected in December 2024, a Master 2 in Architecture of Complex Communication Systems from Université de Bretagne Sud, and a Master's degree in Telecommunications Engineering from Université Antonine.