Sameep Shah

Sameep Shah is a skilled engineer with extensive experience in ASIC design and validation. Currently serving as a Member of Technical Staff at Enfabrica since December 2021, Sameep has previously held positions such as Senior ASIC Design Engineer at Marvell Technology and Innovium Inc., and SoC Design Engineer at Intel Corporation. Expertise includes collaborating with architects on feature specifications, implementing memory storage IP designs, debugging pre-silicon and post-silicon issues, and providing RTL and validation support. Educational background includes a Bachelor of Science in Electrical/Computer Engineering with a focus on VLSI and Computer Design from The University of Texas at Austin.