Amir Yanai

Amir Yanai is an experienced professional in the field of FPGA and ASIC design, with a robust career spanning over two decades. Currently serving as the FPGA team manager at F5 Networks since October 2012, Amir previously held leadership roles at corrigent and Orckit-Corrigent as an FPGA team leader. Earlier in the career, Amir was a verification team leader at Infineon Savan and contributed to ASIC design as both a designer and team leader at Optix Networks and Lucent Technologies, among others. Amir started the professional journey as a VLSI designer at Motorola Semiconductor following a solid educational background from Ben-Gurion University of the Negev.