Tiep Ngo is a seasoned professional in the field of Design for Test (DFT) with extensive experience across several leading technology companies. Currently serving as a Principal DFT at Infineon Technologies, Tiep has previously held the position of DFX uArch Engineer at Intel Corporation. Prior to that role, Tiep worked as a Senior Staff DFT Engineer at MediaTek, and has progressed through various titles including Staff DFT Engineer, Senior DFT Engineer, and DFT Engineer at Inphi Corporation.
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