Stefan Bieser

Stefan Bieser is a Principal Development Engineer at ABB, where they specialize in FPGA and System On Chip development, VHDL programming, and SystemVerilog simulation. Prior to this role, they served as a Senior Development Engineer at ABB from 2000 to 2012, focusing on FPGA development and VHDL programming. Stefan holds a Dipl. Ing. FH in Electrical Engineering from Fachhochschule Furtwangen and a Master of Advanced Studies in Microelectronics from Fachhochschule Nordwestschweiz FHNW.