Vivek Siddharth is a Senior Designer in R&D at Siemens in the United States, specializing in electrical engineering with a focus on high and medium voltage transformers. With a robust background in electric locomotives, Vivek has contributed to design verification and optimization using COMSOL Multiphysics and applied AI/ML to enhance manufacturing solutions. Previously, Vivek held roles at Areva T&D India Ltd as a Manager of Design and at ABB Inc. as a Senior Design Engineer, where they developed electro-technical solutions and oversaw engineering tasks. Vivek earned a Bachelor of Engineering in Electrical from Motilal Nehru National Institute of Technology and a Master of Technology in Electrical Engineering from the Indian Institute of Technology, Delhi.
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