Shantanu Sable

Shantanu Sable is a Senior Design Verification Engineer at Techsoc Technologies Private Limited with experience in design and verification spanning three years. Formerly, Shantanu worked as a Design and Verification Engineer at BITSILICA and as a Design and Verification trainee at Maven Silicon. Currently, Shantanu is also a Senior Hardware Engineer at ACL Digital. Shantanu holds a Bachelor of Engineering in Electrical and Electronics Engineering from Sant Gadge Baba Amravati University. Proficient in digital electronics and various verification tools, Shantanu specializes in Verilog, System Verilog, and UVM.