Adel Ejjeh

Adel Ejjeh, PhD, is a Staff Compiler Engineer and Compiler Architect at AMD, specializing in GPU compilers and high-level synthesis for FPGA acceleration. With a strong academic background that includes a PhD in Computer Science from the University of Illinois Urbana-Champaign and a Master of Engineering from the American University of Beirut, Adel has developed expertise in LLVM-based compiler development and tools that enhance design quality and usability. Previously, they contributed significantly to Altera’s high-level synthesis FPGA Compiler as a technical lead, driving product direction and architectural decisions. Throughout their career, Adel has published research, mentored students and junior engineers, and led collaborative efforts across organizations, including Intel and Altera.