AG

Akash G.

Senior Silicon Design Engineer

Akash G. is a Verification Engineer specializing in cores verification, currently employed at AMD. They possess experience in functional verification using UVM methodology and have developed skills in RTL design with Verilog/SystemVerilog. Akash previously held roles as a Senior Silicon Design Engineer, Graduate Research Assistant, and Functional Verification Intern. They earned a Master of Science from Arizona State University and a Bachelor of Technology from Guru Nanak Dev University.

Location

Austin, United States

Links


Org chart

This person is not in the org chart


Teams

This person is not in any teams


Offices

This person is not in any offices