Alex Miretsky

Alex Miretsky is an accomplished engineer with extensive experience in semiconductor design and system performance verification. Currently a Fellow at AMD since January 2016, Miretsky focuses on dGPU/APU SOC system performance verification. Prior to this role, significant contributions were made as a Senior Staff Engineer at Qualcomm, where key involvement in ARM MVSA System Memory Management Unit architecture definition and performance modeling for SnapDragon processors was achieved. Miretsky's earlier experience includes serving as a Senior Member of Technical Staff at AMD, leading power management verification for the Graphic North Bridge, and holding various technical leadership positions at Azanda Network Devices, LSI Logic, Cisco Systems, Intel Corporation, and Motorola Semiconductor, where expertise in ASIC development and architectural design was honed across multiple projects.