Ben W. is a highly skilled Sr. Analog & Mixed Signal Layout Engineer at AMD, with extensive experience in designing custom analog and mixed-signal circuit layouts and ensuring precise physical and post-layout verification across advanced technology processes, including 5nm, 3nm, and 2nm. Previous roles include significant contributions to post-silicon validation for high-performance GPUs at AMD, and notable internships at Intel, NVIDIA, and other technology firms focused on software automation, hardware validation, and engineering tools development. Academic credentials include a Master of Engineering in Electrical and Electronics Engineering from the University of Toronto and a Bachelor of Applied Science in Electrical Engineering from the University of Waterloo.
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