Brian Emberling

Brian Emberling is a Senior Fellow and Graphics Hardware Architect at AMD, where they have led the design of instruction set architecture and shader execution hardware since 2007. Prior to this role, Brian worked as a Senior ASIC Design Engineer at Sun Microsystems and as a Logic Designer and Architect at ATI Technologies, contributing to multiple generations of graphics products. They began their career as a Logic Designer at Fujitsu Microelectronics, focusing on chipset and SPARC embedded microprocessors. Brian holds a BS in Computer Engineering from the University of California, Santa Cruz, and an MS in Electrical Engineering from Stanford University.