Brian Lay

Brian Lay is a Senior Manager and Vivado FPGA Software Application Engineer with extensive experience in VLSI circuit design and product management. They worked as a Member of Technical Staff at AMD from 2004 to 2013, focusing on ASIC hardware engineering, and later held senior managerial roles at both AMD and Xilinx, overseeing teams dedicated to design entry in Vivado. Brian gained foundational experience as a Hardware Engineer at Sun Microsystems and as a Hardware Intern at Honeywell. They earned a BS in Electrical Engineering from the University of Minnesota and an MS from the University of Illinois Urbana-Champaign, where they also contributed to research in computational plasma physics.