Daniel Zeleznikar

Daniel Zeleznikar is an Adaptive SoC Architect specializing in communications and digital signal processing, with significant experience in telecom, aerospace, and defense industries. They currently work as a System Architect at AMD, focusing on next-generation programmable logic SoC architectures. Previously, they served as a DSP Algorithm Engineer at Intel Corporation, where they developed algorithms for high-speed transceivers. Daniel's work history includes roles at NASA Glenn Research Center and LGS Innovations, among others. They earned a Bachelor of Science degree from The Ohio State University and have completed elective graduate coursework at Purdue University.