David A.

David A. is an AMD Fellow with extensive experience in verification methodologies for various AMD SoCs, including MI Instinct and RDNA series, and serves as an architect for Design-for-Verification and Validation. With a strong background in power management and machine learning-based research, David A. has contributed to the development of critical verification solutions and served as an industry liaison. Prior to AMD, David A. held postdoctoral research positions at Ryerson University and McMaster University, focusing on signal processing, data mining, and collaborations with defense organizations. Early career experience includes leadership roles at Freescale Semiconductor in SoC integration and DFT logic design. David A. holds a PhD in Electrical and Computer Engineering from McMaster University, along with various advanced degrees in related fields.