Deep Shah is a seasoned engineer specializing in power analysis and optimization, currently serving as a PMTS Silicon Design Engineer at AMD. With previous roles as a Senior RTL CAD Engineer at Xilinx and a Corporate Applications Engineer at Synopsys, Deep has contributed to various projects emphasizing power verification and design. Deep holds an MS in Computer Engineering from New York University - Polytechnic School of Engineering and a B.Tech in Engineering from Nirma University. Prior to their current position, Deep demonstrated strong analytical skills and teamwork during a research internship at the Institute For Plasma Research, where they developed safety mechanisms for plasma heating systems.
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