Dimpesh Patel is a SMTS Silicon Design Engineer at AMD, focusing on the microarchitecture and design of UCIe Chiplet Interconnect IP. They have previously held roles as a Technical Design Lead at Solidigm and Intel Corporation, where they supervised teams and developed low power control modules for SSD controllers. Dimpesh began their career as a Digital Design Engineer at Snowbush IP, where they designed digital circuit blocks for various communication standards. They earned a Master of Applied Science in Digital ASIC Design for Wireless Communications from the University of Toronto.
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