Hao Chen is currently a Senior Member of Technical Staff at AMD, where they are engaged in developing next-generation AI and gaming GPUs. With extensive experience as a Design Verification Engineer in the semiconductor industry, Hao has honed their skills in Verilog, SystemVerilog, and UVM, among other tools. They previously held roles at NXP Semiconductors as a Principal Design Engineer and Design Verification Intern, and conducted undergraduate research at both The University of Arizona and RWTH Aachen University. Hao earned a Master of Science in Electrical and Computer Engineering from The University of Texas at Austin, following a Bachelor of Science from The University of Arizona.
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