Harshit P. is an accomplished engineering professional with extensive experience in semiconductor design and verification. Currently serving as a Director at AMD since February 2022, Harshit previously held a similar role at Xilinx, where responsibilities included driving pre-silicon verification for key hard IPs in FPGA SmartNICs. Prior to these positions, Harshit accumulated 15 years of experience at Intel Corporation, advancing from Component Design Engineer to Engineering Manager, where leadership included functional verification of PCIe, Switch, I/O Cache Controllers, and Analog Front End mixed-signal verification for next-generation Xeon processors. Harshit holds a Master's degree in Electrical & Computer Engineering from Auburn University and a Bachelor's degree in Electronics Engineering from the University of Mumbai.
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