Harshit Sood

Harshit Sood is a Silicon Design Engineer 2 at AMD since August 2023, with prior experience as a SoC Design Engineer at Intel Corporation from January 2022 to June 2023, where contributions included EMIR Analysis for a 4nm technology node project and optimizing IR drop for a 3nm node discrete graphics chip. Earlier work includes a role as a Student Researcher at the Department of Electrical & Computer Engineering, focusing on neuromorphic circuits, and as a Research Assistant at the Indian Institute of Science on a mmWave communication system. Additionally, experience as a Physical Design Engineer at Intel involved handling a 14nm technology node, while an internship at Intertek covered performance testing of LED lamps and streetlights. Harshit holds an MS in Electrical Engineering from The University of Texas at Dallas and a B.Tech in Electrical, Electronics, and Communications Engineering from Vellore Institute of Technology.