Jan Glott is a Senior Fellow and Server CPU Validation Architect at AMD, where they have been responsible for driving server CPU validation strategies and tools since 2021. Prior to this role, Jan worked as a Principal Engineer at Intel Corporation from 1998 to 2021, focusing on system validation and debug strategies for Intel server CPU families. Jan also served as an ASIC Design Engineer at NCR Corporation from 1989 to 1997, developing cache, memory, and system interface controllers for Intel-based multi-processor servers. Jan earned a Bachelor of Electrical Engineering from the Georgia Institute of Technology in 1989.
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