Jiarui Cheng has extensive experience in ASIC verification, having served as a Sr. ASIC Verification Engineer at KT Micro, Inc. from July 2011 to June 2016, where involvement included chip verification for various projects such as security SoC for mPOS applications and dual interface smart cards. Following this, Jiarui Cheng worked at AMD, holding multiple roles including SMTS ASIC Verification Engineer, responsible for legacy USB3 and USB3 Adapter projects, and USB3 IP DV owner for Navi series projects. Jiarui Cheng also earned a Master of Engineering in Microelectronics from Peking University, completing the degree in 2011.
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