JP

Jinal Patel

Senior Sillicon Design Engineer

Jinal Patel is a Senior Silicon Design Engineer at AMD, where they have been since 2022. Previously, they worked as a Design Engineer at Qualcomm from 2018 to 2022 and as a Project Trainee at eInfochips in 2017. Jinal holds a Master of Technology in VLSI Design from Nirma University, obtained in 2018, and a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Government Engineering College Gandhinagar, completed in 2015. Known for their innovative and self-motivated approach, Jinal specializes in VLSI frontend design and debugging.

Location

Toronto, Canada

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