Layne Flake

Layne Flake is currently a Hardware Electrical Engineering Manager at AMD, bringing over two decades of experience in high-speed hardware design and engineering leadership. Previously, Layne held positions as a Senior Hardware/FPGA Design Engineer at Intel Corporation and a Senior Hardware Electrical Engineer at ZT Systems, where they led teams in the design and validation of server systems, achieving significant advancements in performance and efficiency. Layne's extensive expertise encompasses PCI Express debugging, signal integrity, and strategic project management from design through to production. They earned a Master of Science in Electrical Engineering from The Ohio State University.