Leya Thomas

Leya Thomas is a Senior Silicon Engineer with extensive experience in SOC, subsystem, and IP level verification. Leya has worked with various protocols, including AHB and AXI, and has contributed to projects involving ARM processors. Leya's expertise encompasses assertion, code coverage, functional coverage, and low power gate level simulations. Currently, Leya is employed at AMD as a Sr Silicon Design Engineer, following roles at Wafer Space and Wipro Technologies, and began their career as a Graduate Trainee at Maven Silicon. Leya holds a degree from Karunya University, completed in 2014.