Michael Wu is a Machine Learning Software Engineer currently working at AMD since 2025. They previously held positions as a Senior Staff FPGA Architect at Intel Corporation from 2021 to 2025 and as a Staff Design Engineer at Xilinx from 2014 to 2021. Michael began their career as a Wireless Research Intern at Nokia in 2008 and had a significant academic journey at Rice University, where they earned a B.S., M.S., and PhD in Electrical and Computer Engineering between 2003 and 2016.
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