Ming So is a Senior Fellow at AMD, specializing as an IO Hub architect with extensive expertise in PC IO and low power ASIC design. With a robust background in project and people management, they have been a significant contributor to hardware architecture since 2008. Prior to their current role, Ming held various positions, including Sr Design Manager at ATI and Member of Technical Staff at Iready and Opti Inc. They began their career as an Engineer II at AMD and have also led projects at Sandia National Laboratories. Ming holds a BSEE from Oregon State University and an MSEE from Stanford University.
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