Ramesh Reddy is a Senior Design Engineer at AMD, where they focus on PCIe address translation service module RTL development. Previously, they served as a Pre & Post Silicon Validation Engineer at Microchip Technology Inc. and interned at Microsemi Corporation. Ramesh earned a Master of Technology (M.Tech.) in System on Chip from the International Institute of Information Technology – Bangalore, graduating with a notable GPA of 8.4.
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