Raviteja Repaka is a Silicon Design Engineer at AMD, where they have been responsible for full chip timing signoff activities for multiple SOCs since 2022. Previously, Raviteja served as a Senior Lead Engineer at Qualcomm from 2020 to 2022, focusing on STA engineering tasks. They began their career as a Design Engineer at ARM Embedded Technologies Pvt. Ltd. from 2013 to 2017. With expertise in synthesis, timing analysis, and the RTL2GDSII flow, Raviteja has led teams in synthesis and STA activities and possesses hands-on experience in various physical design methodologies.
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