Sean An

Sean An is a PMTS Silicon Design Engineer at AMD with over 15 years of experience in hardware system architecture and RTL design in ASIC and FPGA development. They have played a key role in delivering multiple generations of AMD's proprietary chiplet interconnection IPs and have led the ASIC IP bring-up for the AMD Infinity Fabric protocol at speeds up to 32Gbps. Previously, Sean held positions at companies including Intel Corporation, FUJIFILM VisualSonics, and Shanghai GM Motors, where they specialized in electronic design and debugging for various complex systems. Sean earned a Bachelor of Engineering from Northwestern Polytechnical University and a Master of Applied Science from Concordia University.