Sujith Reddy is a Senior Silicon Design Engineer at AMD, where they contribute to the development of next-generation DRAM controllers. Previously, they gained experience as a Design Verification Engineer at Cerium Systems, focusing on verifying gen5 DDR at the test chip level and participating in various design projects. Sujith also interned at Cisco and Amphenol and completed a Bachelor's degree from PES University and a Master's degree from San Jose State University in Electrical and Electronics Engineering. Passionate about VLSI and digital design, they thrive under pressure and enjoy tight deadlines.
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