Tapas Biswas is a Validation Lead currently working at AMD, where they architect and implement new solutions with FPGA. Previously, Tapas served as a Debug/Validation Architect at Intel Corporation from 2020 to 2023 and held the position of Senior Systems Engineer. Earlier in their career, they worked as a Systems Engineer at DCM Data Systems from 1995 to 2001. Tapas holds a BS in Physics from Delhi University and an MCA in Computer Science from Jawaharlal Nehru University, both degrees complementing their extensive technical background.
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