Teja Singh has extensive experience in circuit design and engineering, currently serving as a Senior Fellow Design Engineer at AMD since February 2002, leading Zen Circuit and Methodology initiatives. Singh progressed through various roles at AMD, including Fellow Design Engineer, PMTS (Jaguar Technical Lead), and SMTS (Bobcat Analysis and Methodology Lead). Prior experience includes positions as a Circuit Designer at Alchemy Semiconductor and Cadence, as well as an internship at Arm focused on Arm10 Cache design. Singh began a career in circuit design at Digital Equipment Corporation, contributing to strongArm circuits. Teja Singh holds a Bachelor of Science in Electrical Engineering from The University of Texas at Austin, earned between 1996 and 1999.
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