Varun Mudgal is currently a Senior Member of Technical Staff at AMD, focusing on memory controller verification and the design verification of protocols such as DDR, I2C, and JESD204C. Previously, Varun served as a Design Verification Lead at Intel Corporation from 2021 to 2023, and as a Senior Engineer at Altran from 2019 to 2021. Varun also has significant experience as a Senior R&D Engineer at Synopsys from 2011 to 2019. Varun earned a Bachelor of Engineering degree in Electronics and Communication from the Netaji Subhas Institute of Technology between 2007 and 2011.
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