Vasanth Kumar is a Senior Silicon Design Engineer at AMD, where they have been employed since 2024. They possess 18 months of experience as an Analog Layout Designer, contributing to a 28GBPS SerDes project and working with TSMC's 16nm FinFET technology. Prior to AMD, Vasanth held positions as a Senior Hardware Engineer at ACL Digital and a Custom Layout Designer at Rubik Semiconductors. They received a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Acharya Nagarjuna University, completing their studies in 2017. Vasanth has also undergone training as an Analog Layout Engineer at I2CD Institute.
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