• AMD

William Bradley

Principal DV Engineer

William Bradley is a Principal Engineer at AMD, where they currently contribute to design verification. They have extensive experience in the semiconductor industry, having previously held senior and lead positions at Samsung Electronics America, where they led teams in verifying high-performance CPU cluster features, and Intel Corporation, where they developed innovative verification methodologies. William's educational background includes a Ph.D. in Computer Engineering from the University of Cincinnati and a Master's degree in Computer Science from the University of Louisville. They began their professional journey as a Staff Verification Engineer at Marvell Semiconductor.

Location

Austin, United States

Links


Org chart

This person is not in the org chart


Teams

This person is not in any teams


Offices

This person is not in any offices