Xi Luo

Xi Luo is an experienced HSIO Application/Validation Engineer currently serving as an SMTS Design Engineer in SerDes Applications at AMD. They have previously worked at prominent companies including Meta, Xilinx, and Microsemi, focusing on silicon validation, transceiver testing, and product engineering. Xi held positions as a Staff Design Engineer and System/Hardware Validation Engineer, where they led innovative post-silicon validation processes and developed high-speed IO interfaces. Additionally, Xi has an educational background in Electrical Engineering from both the University of Toronto and Stanford University.