Venka P.

Venka P. is an experienced engineering professional specializing in ASIC, FPGA, DSP, and hardware design. Currently serving as Principal Design Engineer at Aeva, Inc. since February 2017, Venka has previously held positions such as Sr. FPGA/Hardware Engineer at LitePoint from April 2013 to February 2017, as well as various engineering roles at Avnet, Desana Systems, and Stanford Telecom/Newbridge Networks/Alcatel. Venka holds a Master of Science in Electrical Engineering with a focus on Signal Processing and Communications from Missouri University of Science and Technology and a Bachelor of Engineering in Electronics and Communications from the University of Mysore.