Mark Lyons

Mark Lyons is an experienced Layout Designer who has worked with various semiconductor companies such as pSemi, Alpha & Omega Semiconductor, Cirrus Logic, Silicon Labs, Vitesse Semiconductor, Freescale Semiconductor, and Motorola Incorporated. Mark has expertise in custom analog/digital layout, block and chip level integration, physical verification, Cadence, and Calibre tools. Mark started their career as a Junior Layout Designer and has worked their way up to Senior positions, showcasing a strong background in layout design and semiconductor fabrication.