KS

Kumar Sanapala

Validation Engineer

Kumar Sanapala is a motivated Industrial Engineer actively seeking full-time opportunities. Currently serving as a Validation Engineer at Altera, Kumar leads FPGA-based post-silicon validation and conducts comprehensive analysis to ensure compliance with design specifications. Previously, Kumar worked as a Hardware Test Engineer at Intel Corporation, where they diagnosed critical system issues and automated lab processes. During an internship at Axivise Information Technologies Inc, Kumar collaborated with various teams to resolve complex hardware issues and contributed to continuous improvement efforts. Kumar holds a Master's degree from Wichita State University and is pursuing a Bachelor's degree from KL University.

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San Jose, United States

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