Lakshya R.

Lakshya R. is a dedicated engineering professional with a focus on design and development in the field of electronics. Lakshya's experience includes roles as an FPGA Design Intern at Evertz and an ASIC Design Intern at Marvell Technology. Currently, Lakshya serves as an FPGA Engineer Intern at Altera, following a SoC Design Intern position at Untether AI. Previous experience includes a Firmware Developer Intern role at onsemi and an upcoming ASIC Design Intern role at Huawei Canada. Lakshya is pursuing a Bachelor of Applied Science at the University of Waterloo, expected to graduate in 2026, and holds an International Baccalaureate Diploma from The International School of Penang (Uplands).