Pal Nikola is an experienced engineer with a background in physical design and software development for system-on-chip (SoC) and field-programmable gate array (FPGA) technologies. At eInfochips, contributions included successful tapeout of a networking chip through physical verification and automation of ECO processes using Shell and TCL scripting. Experience at Intel Corporation encompassed roles as a SoC Design Engineer and FPGA IP Software Development Engineer. Pal Nikola is currently employed at Altera as an FPGA IP Software Development Engineer since January 2024. Educational qualifications include a Bachelor of Technology in Information and Communication Technology from Ahmedabad University and a Master's degree in Electrical Engineering Technologies from San Jose State University.
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