shiyao wang

Shiyao Wang is a Computer Vision Engineer specializing in FPGA/ASIC IP development at Altera, with nearly 20 years of experience in ASIC/FPGA design and implementation. Previously, Shiyao designed high-performance video IP solutions, contributing to flagship blocks such as deinterlacer IPs and MIPI DSI IP while securing significant customer deals at Intel Corporation. Shiyao's past work at SWINDON Silicon Systems involved designing digital IP blocks and automation scripts, greatly enhancing productivity. Shiyao holds an MSc in IC Design from Imperial College London and a BEng in Electrical & Electronic Engineering from the University of Sussex. Passionate about advancing video IP technologies, Shiyao actively mentors engineers and shares knowledge within the field.