Shurhavetsky Stas is the HW Validation Post Silicon Team Lead at Altera, a position they have held since 2025. Currently, they are also a Post Silicon Electrical Validation Engineer at Intel, a role they have occupied since 2006, specializing in high-speed serial buses and hardware and SoC validation. Previously, Shurhavetsky worked in final testing at RAD from 2002 to 2006. Shurhavetsky holds a Bachelor of Science in Industrial Engineering from Jerusalem College of Engineering, a Practical Engineering degree from Technion - Israel Institute of Technology, and is pursuing a Master of Business Administration at The Hebrew University of Jerusalem.
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