Sriram R. is an accomplished EDA Software Engineer at Altera since August 2025, specializing as the tools, flows, and methodology lead. Previously, Sriram held various engineering roles at Achronix Semiconductor Corporation from November 2017 to August 2025, including Principal Engineer, contributing to automation, methodology, and DevOps initiatives while being instrumental in FPGA chip development from 16nm to 3nm. Prior experience includes serving as Senior Hardware Engineer at Oracle from August 2012 to October 2017, where Sriram designed high-performance SRAMs for SPARC processors across multiple generations and led a team in SRAM macro design. Earlier roles include teaching assistant positions at the University of Pennsylvania and an IT internship at Vanguard. Sriram holds a Bachelor of Science in Engineering with a focus on Electrical Engineering from the University of Pennsylvania.
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