Tim Vanderhoek

Tim Vanderhoek is currently an Engineering Manager (FPGA ML IP) at Intel, with over 20 years of experience in engineering. They have managed teams ranging from five to over thirty-five engineers and are known for developing agile teams adept at responding to changing requirements. Tim's past roles include developing the Altera FPGA AI Suite and leading various FPGA-related projects, demonstrating a solid technical background in FPGA routing and logic, as well as a commitment to transparency and team empowerment. They hold a Bachelor of Applied Science in Engineering Science (Aerospace) from the University of Toronto.