Yashwanth Kumar is a Senior Design Verification Engineer at Ambarella Inc, currently developing and maintaining UVM environments for multimedia SoCs. With over five years of experience in validation, Yashwanth previously held roles as a Pega Developer at Cisco and John Deere, where they designed applications and enhanced workflows. Yashwanth also worked as a Verification Engineer at both QUALCOMM and Intel, focusing on various IPs and improving regression automation. They earned a Master's degree in Computer Science from Northern Arizona University in 2023.
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